Buried channels in porous silicon and glass

There is increasing interest in nanofluidic systems as a result of their demonstrated unique bioanalytical capabilities in nanofluidic devices, including the ability to elongate single DNA molecules, concentrate protein samples by more than four orders of magnitude, and efficiently separate biomolecules. The fabrication of nanofluidic structures plays an essential role in bio-nanotechnology, including sequencing of large-scale genomic information and epigenetic profiling. Various techniques have been reported to fabricate nanochannels, such as e-beam lithography, step sidewalls, CMOS processes, laser writing and nanoimprinting. However flexible fabrication of long, stable nano-channels of with sub-100 nm diameter is still challenging and fabrication of multi-layer nanofluidic chips with 3D channel architecture with these essentially 2D writing technologies has been elusive, despite their potential importance for versatile lab on chip designs.

The CIBA process has been refined to produce a simple process to fabricate deeply buried micro- and nano-scale channels in glass and porous silicon, using a combination of ion beam irradiation, electrochemical anodization and high temperature oxidation. The depth, width and length of these structures can be controllably varied and we have successfully fabricated an array of centimeter long buried micro and nano-channels. This process allows densely-packed, arbitrary-shape channel geometries with micro- to nano-scale dimensions to be produced in a three-dimensional multilevel architecture, providing a route to fabricating complex devices for use in nanofluidics and lab-on-a-chip systems. These channels can be integrated with large reservoirs for DNA linearization studies in high aspect ratio nanochannels.

Fabrication Process

At CIBA we recently observed the effects of diffusion current funneling induced by low-fluence ion irradiation, resulting in a significant anodization current flowing into regions of reduced carrier density. Here we use this effect as a means of inducing a high anodization current to flow through ion irradiated end-of-range regions, i.e. the opposite effect of that observed at high fluences where current is excluded, enabling the fabrication of complex micro- and nano-scale buried channels in porous silicon and glass.

The first step is irradiation of p-type silicon with a low fluence of high-energy ions which have a well-defined range of 0.5 to 50 µm, see Figure 1, generated using SRIM. Ion irradiation results in a small volume at the end-of-range depth being highly damaged, with the portion closer to the surface being damaged to a lesser extent. For 1 MeV protons the maximum damage occurs at an end-of-range depth of ~15 µm, allowing a sub-surface distribution of reduced carrier density to be built up, Figure 2a. The low-fluence irradiated wafers are electrochemically anodized in a solution of 24% HF (a 1:1 solution of HF (48%):ethanol) for several minutes, depending on the required etch depth. During electrochemical anodization the hole current is funneled and concentrated into the lightly-damaged end-of-range regions, (see inset in Figure 2b); the combined effect of a locally increased current passing through a region of decreased carrier density results in highly porous silicon being selectively formed at the end-of-range regions, compared to the surrounding unirradiated silicon where lower porosity silicon is formed.

After anodization the sample is rinsed in ethanol and then in distilled water for 5 minutes. After a certain period of exposure of the anodized wafer to ambient conditions (typically three days), or by brief thermal oxidation, all remaining porous silicon is slightly oxidized. The oxide is easily removed by brief immersion in dilute hydrofluoric acid. Highly porous silicon at the end-of-range regions are completely removed by this process, while the lower porosity surrounding regions remain intact, resulting in buried channels in porous silicon, Figure 2c. To fabricate buried channels in glass, a high temperature oxidation step (1000C for two hours) converts all remaining porous silicon into fully oxidized porous silicon (FOPS). Under optimized wafer anodization and oxidation conditions (described below) this forms a continuous volume of glass, Figure 2d.

Figure 1. (a) SRIM simulated plot for defect distribution versus depth for 1 MeV protons in silicon. The box size is 20 × 20 µm. (b) Anodized p-type silicon porosity versus wafer doping density for different anodization current densities [data from Ref. XX].

Figure 2. Schematic of steps for making buried horizontal channels (a) low fluence irradiation of lines and extended areas, producing high defect concentration at the end of range depth, (b) deep electrochemical anodization to produce a low porosity silicon matrix with high porosity end-of-range regions. The inset shows a schematic of current funneling into the end-of-range region during anodization. (c) removal of highly porous silicon using dilute HF, (d) high temperature oxidation to convert remaining low porosity silicon into FOPS.

Examples of fabricated channels

Figure 3 shows examples of channel fabricated in porous silicon using this process. (a) ?? Figure 3(b),(c) show cross-section SEMs of lines in porous silicon which were irradiated with 1 MeV protons over widths of 0.2, 3, 5, 10, 17 µm from left to right, after anodization, with four adjacent lines irradiated in each case. (b) before removal of highly porous regions, (c) low magnification of all lines after removal of highly porous silicon. The left-hand dashed box indicates the locations of the 0.2 µm width irradiations with a line fluence of Ψl = 3×1010/cm. (d) 100 keV proton irradiation with a fluence of 1×1015 ions/cm2 over a width of 1 µm to fabricate buried high-aspect ratio channels with a large core. (e) vertical channels in porous silicon, formed using 1 MeV protons. (f) channels in porous silicon at different depths, produced using different proton energies.

Figure 3. Examples of channel fabricated in porous silicon using this process.

Figure 4. Examples of channels in glass using this process.

Integration of channels with large scale components

We have explored several processes for integrating buried channels in porous silicon and glass with larger scale structures such as fluid reservoirs, using existing methods of surface patterning of porous silicon. Figure 5 presents three examples of different approaches. Figure 5(a) shows a schematic of buried hollow channels connected to large reservoirs. Figure 5 (b) [UPPER] shows a cross-section of channels in porous silicon formed by laser-induced oxidation. [LOWER] Device where hollow microchannels in porous silicon are connected to reservoirs formed by laser oxidation. In Figure 5(c) reservoirs in silicon are formed by KOH etching. Figure 5 (d) shows a device where nanochannels in glass are connected to reservoirs formed by RIE and FIB.

Figure 5. (a) Schematic of buried hollow channels connected to large reservoirs. (b) to (d) show different approaches to integration.